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This document provides an overview of these updates.
FPGA image processing IP was introduced as part of the Vision Development Module 2014 and NI has continued to make investments in improving our FPGA image processing IP since.
Utilizing the AVI palette, you can read and write compressed AVIs in order to access additional data, such as time-stamp data, with your images.
New Sauvola Local Threshold Algorithm In the Vision Development Module 2016, the Sauvola Local Threshold Algorithm has been added.
This feature encompasses support for new pattern matching score-based defect inspection techniques.
The specific VIs made available to users are: IMAQ Calculate Defect Map VI - This VI can be used to create a defect map for each match found between template and match image.
NI continues to make investments in the NI Vision Assistant so that you can utilize it for algorithm development.
In VDM 2017 the following features were added: Map Defects step - This new feature allow you to perform score-based pattern matching defect inspection techniques. Support for 16-bit images in Pattern Matching step - Users can now implement Pattern Matching algorithms of U16 and I16 image types through the added 16 – bit support.
Specifically, the Vision Development Module 2017 added 8- pixel support for: Defect Map Inspection In the Vision Development Module 2017, Defect Map Inspection was added.The added improvements include: 8-Pixel Processing In the Vision Development Module 2016, NI has added FPGA IP that is capable of multi-pixel (x8) parallel processing for higher throughput applications.This feature is available only on Kintex-7 FPGA targets.This new IP allows you to accelerate your image processing with the use of FPGAs.Vision Development Module 2015 adds additional FPGA Image Processing IP.
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Extended Support for Pattern Matching Algorithms Starting in the Vision Development Module 2017 users can now implement Pattern Matching algorithms on U16 and I16 image types through the added 16 – bit support.